Cache coherence

What is cache coherence?
Cache-Kohärenz ist die Regelmäßigkeit oder Konsistenz von Daten, die im Cache memory gespeichert sind. Die Aufrechterhaltung der Konsistenz von Cache und Speicher ist für Multiprozessoren oder DSM-Systeme (Distributed Shared Memory) zwingend erforderlich.

The cache management is structured in such a way that data is not overwritten or lost. Various techniques can be used to maintain cache coherence, including directory-based coherence, bus snooping, and snarfing. To maintain consistency, a DSM system mimics these techniques and uses a coherency protocol that is essential to system operations. Cache coherence is also referred to as cache coherence or cache consistency.

The majority of coherency protocols that multiprocessors support use a sequential consistency standard. DSM systems use a weak or release consistency standard. The following methods are used for cache coherence management and consistency in read / write (R / W) and momentary operations: Written data locations are sequenced. Writes are immediate.

The preservation of the program order is maintained with RW data. A coherent memory view is maintained, in which consistent values are provided across the shared memory.

Different types of cache coherency can be used by different structures as follows: Directory-based coherency: Refers to a filter in which memory data is accessible to all processors. When space data changes, the cache is updated or invalidated. Bus Snooping: Monitors and manages the entire cache memory and notifies the processor when a write operation is in progress.

Used in smaller systems with fewer processors. Snarfing: Self-monitors and updates its address and data versions. Requires large amounts of bandwidth and resources compared to directory-based coherence and bus snooping.

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